Higher BER on SDCCH timeslots This topic has 0 replies, 1 voice, and was last updated 13 years ago by HW. Viewing 1 post (of 1 total) Author Posts 13th April 2011 at 13:39 #66182 HWGuest Does anybody know why we observe higher bit error rates on SDCCH timeslots rather than TCH timeslots? Author Posts Viewing 1 post (of 1 total) The forum ‘Telecom Design’ is closed to new topics and replies.